---
title: VMX Capabilities
framework: hypervisor
role: collectionGroup
role_heading: API Collection
path: hypervisor/1469645-vmx-capabilities
---

# VMX Capabilities

An enumeration that represents the available VMX capabilities.

## Overview

Overview The capabilites available to the hypervisor can vary depending on the specific hardware platform or OS release. Use the hv_vmx_read_capability(_:_:) API at run time to determine the capabilities that can you can select. The example below demonstrates the process for checking for the availability a specific capability, here checking for the avaiability of timestamp-counter scaling (TSC scaling): static uint64_t canonicalize(uint64_t ctrl, uint64_t mask) {     return (ctrl | (mask & 0xffffffff)) & (mask >> 32); }

main() {          // Fetch the supported capabilities for the PROCBASED2 field     if (hv_vmx_read_capability(HV_VMX_CAP_PROCBASED2, &proc2_cap) != 0)         errx(1, "vcpu_read_capability(%u, CAP_VMX_PROCBASED2) failed", vcpu);          // Apply the constraints to our request to use TSC scaling     const uint64_t newcap = canonicalize(CPU_BASED2_TSC_SCALING, proc2_cap);          // Test to see if that bit is supported on this platform     if ((newcap & CPU_BASED2_TSC_SCALING) == 0) {         warnx(“TSC scaling not supported on this platform”);     }          // Continue, but without TSC scaling ...     write_vmcs(vcpu, VMCS_CTRL_CPU_BASED2, newcap);

// ... }

## Topics

### Capabilities

- [PIN_BASED_INTR](hypervisor/pin_based_intr.md)
- [PIN_BASED_NMI](hypervisor/pin_based_nmi.md)
- [PIN_BASED_VIRTUAL_NMI](hypervisor/pin_based_virtual_nmi.md)
- [PIN_BASED_PREEMPTION_TIMER](hypervisor/pin_based_preemption_timer.md)
- [PIN_BASED_POSTED_INTR](hypervisor/pin_based_posted_intr.md)
- [CPU_BASED_IRQ_WND](hypervisor/cpu_based_irq_wnd.md)
- [CPU_BASED_TSC_OFFSET](hypervisor/cpu_based_tsc_offset.md)
- [CPU_BASED_HLT](hypervisor/cpu_based_hlt.md)
- [CPU_BASED_INVLPG](hypervisor/cpu_based_invlpg.md)
- [CPU_BASED_MWAIT](hypervisor/cpu_based_mwait.md)
- [CPU_BASED_RDPMC](hypervisor/cpu_based_rdpmc.md)
- [CPU_BASED_RDTSC](hypervisor/cpu_based_rdtsc.md)
- [CPU_BASED_CR3_LOAD](hypervisor/cpu_based_cr3_load.md)
- [CPU_BASED_CR3_STORE](hypervisor/cpu_based_cr3_store.md)
- [CPU_BASED_CR8_LOAD](hypervisor/cpu_based_cr8_load.md)
- [CPU_BASED_CR8_STORE](hypervisor/cpu_based_cr8_store.md)
- [CPU_BASED_TPR_SHADOW](hypervisor/cpu_based_tpr_shadow.md)
- [CPU_BASED_VIRTUAL_NMI_WND](hypervisor/cpu_based_virtual_nmi_wnd.md)
- [CPU_BASED_MOV_DR](hypervisor/cpu_based_mov_dr.md)
- [CPU_BASED_UNCOND_IO](hypervisor/cpu_based_uncond_io.md)
- [CPU_BASED_IO_BITMAPS](hypervisor/cpu_based_io_bitmaps.md)
- [CPU_BASED_MTF](hypervisor/cpu_based_mtf.md)
- [CPU_BASED_MSR_BITMAPS](hypervisor/cpu_based_msr_bitmaps.md)
- [CPU_BASED_MONITOR](hypervisor/cpu_based_monitor.md)
- [CPU_BASED_PAUSE](hypervisor/cpu_based_pause.md)
- [CPU_BASED_SECONDARY_CTLS](hypervisor/cpu_based_secondary_ctls.md)
- [CPU_BASED2_VIRTUAL_APIC](hypervisor/cpu_based2_virtual_apic.md)
- [CPU_BASED2_EPT](hypervisor/cpu_based2_ept.md)
- [CPU_BASED2_DESC_TABLE](hypervisor/cpu_based2_desc_table.md)
- [CPU_BASED2_RDTSCP](hypervisor/cpu_based2_rdtscp.md)
- [CPU_BASED2_X2APIC](hypervisor/cpu_based2_x2apic.md)
- [CPU_BASED2_VPID](hypervisor/cpu_based2_vpid.md)
- [CPU_BASED2_WBINVD](hypervisor/cpu_based2_wbinvd.md)
- [CPU_BASED2_UNRESTRICTED](hypervisor/cpu_based2_unrestricted.md)
- [CPU_BASED2_APIC_REG_VIRT](hypervisor/cpu_based2_apic_reg_virt.md)
- [CPU_BASED2_VIRT_INTR_DELIVERY](hypervisor/cpu_based2_virt_intr_delivery.md)
- [CPU_BASED2_PAUSE_LOOP](hypervisor/cpu_based2_pause_loop.md)
- [CPU_BASED2_RDRAND](hypervisor/cpu_based2_rdrand.md)
- [CPU_BASED2_INVPCID](hypervisor/cpu_based2_invpcid.md)
- [CPU_BASED2_VMFUNC](hypervisor/cpu_based2_vmfunc.md)
- [CPU_BASED2_VMCS_SHADOW](hypervisor/cpu_based2_vmcs_shadow.md)
- [CPU_BASED2_ENCLS_EXIT_MAP](hypervisor/cpu_based2_encls_exit_map.md)
- [CPU_BASED2_RDSEED](hypervisor/cpu_based2_rdseed.md)
- [CPU_BASED2_PML](hypervisor/cpu_based2_pml.md)
- [CPU_BASED2_EPT_VE](hypervisor/cpu_based2_ept_ve.md)
- [CPU_BASED2_PT_CONCEAL_VMX](hypervisor/cpu_based2_pt_conceal_vmx.md)
- [CPU_BASED2_XSAVES_XRSTORS](hypervisor/cpu_based2_xsaves_xrstors.md)
- [CPU_BASED2_EPT_MODE_BASED_EXEC](hypervisor/cpu_based2_ept_mode_based_exec.md)
- [CPU_BASED2_EPT_SUBPAGE_WRITE](hypervisor/cpu_based2_ept_subpage_write.md)
- [CPU_BASED2_PT_GUEST_PHYSICAL](hypervisor/cpu_based2_pt_guest_physical.md)
- [CPU_BASED2_TSC_SCALING](hypervisor/cpu_based2_tsc_scaling.md)
- [CPU_BASED2_USER_WAIT_PAUSE](hypervisor/cpu_based2_user_wait_pause.md)
- [CPU_BASED2_ENCLV_EXIT_MAP](hypervisor/cpu_based2_enclv_exit_map.md)
- [VMX_EPT_VPID_SUPPORT_AD](hypervisor/vmx_ept_vpid_support_ad.md)
- [VMX_EPT_VPID_SUPPORT_EXONLY](hypervisor/vmx_ept_vpid_support_exonly.md)
- [VMEXIT_SAVE_DBG_CONTROLS](hypervisor/vmexit_save_dbg_controls.md)
- [VMEXIT_HOST_IA32E](hypervisor/vmexit_host_ia32e.md)
- [VMEXIT_LOAD_IA32_PERF_GLOBAL_CTRL](hypervisor/vmexit_load_ia32_perf_global_ctrl.md)
- [VMEXIT_ACK_INTR](hypervisor/vmexit_ack_intr.md)
- [VMEXIT_SAVE_IA32_PAT](hypervisor/vmexit_save_ia32_pat.md)
- [VMEXIT_LOAD_IA32_PAT](hypervisor/vmexit_load_ia32_pat.md)
- [VMEXIT_SAVE_EFER](hypervisor/vmexit_save_efer.md)
- [VMEXIT_LOAD_EFER](hypervisor/vmexit_load_efer.md)
- [VMEXIT_SAVE_VMX_TIMER](hypervisor/vmexit_save_vmx_timer.md)
- [VMEXIT_CLEAR_IA32_BNDCFGS](hypervisor/vmexit_clear_ia32_bndcfgs.md)
- [VMEXIT_PT_CONCEAL_VMX](hypervisor/vmexit_pt_conceal_vmx.md)
- [VMEXIT_CLEAR_IA32_RTIT_CTL](hypervisor/vmexit_clear_ia32_rtit_ctl.md)
- [VMEXIT_LOAD_CET_STATE](hypervisor/vmexit_load_cet_state.md)
- [VMENTRY_LOAD_DBG_CONTROLS](hypervisor/vmentry_load_dbg_controls.md)
- [VMENTRY_GUEST_IA32E](hypervisor/vmentry_guest_ia32e.md)
- [VMENTRY_SMM](hypervisor/vmentry_smm.md)
- [VMENTRY_DEACTIVATE_DUAL_MONITOR](hypervisor/vmentry_deactivate_dual_monitor.md)
- [VMENTRY_LOAD_IA32_PERF_GLOBAL_CTRL](hypervisor/vmentry_load_ia32_perf_global_ctrl.md)
- [VMENTRY_LOAD_IA32_PAT](hypervisor/vmentry_load_ia32_pat.md)
- [VMENTRY_LOAD_EFER](hypervisor/vmentry_load_efer.md)
- [VMENTRY_LOAD_IA32_BNDCFGS](hypervisor/vmentry_load_ia32_bndcfgs.md)
- [VMENTRY_PT_CONCEAL_VMX](hypervisor/vmentry_pt_conceal_vmx.md)
- [VMENTRY_LOAD_IA32_RTIT_CTL](hypervisor/vmentry_load_ia32_rtit_ctl.md)
- [VMENTRY_LOAD_CET_STATE](hypervisor/vmentry_load_cet_state.md)

## See Also

### Capabilities

- [hv_vmx_read_capability(_:_:)](hypervisor/hv_vmx_read_capability(_:_:).md)
- [hv_vmx_get_msr_info(_:_:)](hypervisor/hv_vmx_get_msr_info(_:_:).md)
- [hv_vmx_capability_t](hypervisor/hv_vmx_capability_t.md)
- [hv_vmx_msr_info_t](hypervisor/hv_vmx_msr_info_t.md)
- [MSR Information Fields](hypervisor/3567084-msr-information-fields.md)