---
title: CPU_BASED2_APIC_REG_VIRT
framework: hypervisor
role: symbol
role_heading: Global Variable
path: hypervisor/cpu_based2_apic_reg_virt
---

# CPU_BASED2_APIC_REG_VIRT

This value controls whether the logical processor virtualizes certain advanced programmable interrupt controller (APIC) accesses.

## Declaration

```swift
var CPU_BASED2_APIC_REG_VIRT: UInt32 { get }
```

## Discussion

Discussion Must be 0.

## See Also

### Capabilities

- [PIN_BASED_INTR](hypervisor/pin_based_intr.md)
- [PIN_BASED_NMI](hypervisor/pin_based_nmi.md)
- [PIN_BASED_VIRTUAL_NMI](hypervisor/pin_based_virtual_nmi.md)
- [PIN_BASED_PREEMPTION_TIMER](hypervisor/pin_based_preemption_timer.md)
- [PIN_BASED_POSTED_INTR](hypervisor/pin_based_posted_intr.md)
- [CPU_BASED_IRQ_WND](hypervisor/cpu_based_irq_wnd.md)
- [CPU_BASED_TSC_OFFSET](hypervisor/cpu_based_tsc_offset.md)
- [CPU_BASED_HLT](hypervisor/cpu_based_hlt.md)
- [CPU_BASED_INVLPG](hypervisor/cpu_based_invlpg.md)
- [CPU_BASED_MWAIT](hypervisor/cpu_based_mwait.md)
- [CPU_BASED_RDPMC](hypervisor/cpu_based_rdpmc.md)
- [CPU_BASED_RDTSC](hypervisor/cpu_based_rdtsc.md)
- [CPU_BASED_CR3_LOAD](hypervisor/cpu_based_cr3_load.md)
- [CPU_BASED_CR3_STORE](hypervisor/cpu_based_cr3_store.md)
- [CPU_BASED_CR8_LOAD](hypervisor/cpu_based_cr8_load.md)