hv_vcpu_set_sme_state(_:_:)

Declaration

func hv_vcpu_set_sme_state(_ vcpu: hv_vcpu_t, _ sme_state: UnsafePointer<hv_vcpu_sme_state_t>) -> hv_return_t

Parameters

• vcpu:

  The ID of the vCPU instance.

• sme_state:

  The pointer to the SME state to set.

Return Value

HV_SUCCESS on success, HV_UNSUPPORTED if SME is not supported on the platform, or an error code otherwise.

Discussion

For any entry or exit from streaming SVE mode, all Z vector and P predicate registers are set to zero, and all FPSR flags are set; you need to save this state if you need to retain it across streaming SVE mode transitions.

In streaming SVE mode, the system aliases the SIMD Q registers to the bottom 128 bits of the corresponding Z register, and any modification reflects on the Z register state.

If the optional FEAT_SME_FA64 is implemented, the full SIMD instruction set is supported in streaming SVE mode; otherwise many legacy SIMD instructions are illegal in this mode.

When finished, disable streaming SVE mode and ZA storage; this serves as a power-down hint for SME-related hardware.

See Also

Functions

• hv_sme_config_get_max_svl_bytes(_:)
• hv_vcpu_apic_ctrl(_:_:)
• hv_vcpu_apic_get_state(_:_:)
• hv_vcpu_apic_lsc_enter_imm32(_:_:_:_:_:_:_:)
• hv_vcpu_apic_lsc_enter_r32(_:_:_:_:_:_:_:_:)
• hv_vcpu_apic_lsc_invalidate(_:)
• hv_vcpu_apic_put_state(_:_:)
• hv_vcpu_apic_read(_:_:_:)
• hv_vcpu_apic_trigger_lvt(_:_:)
• hv_vcpu_apic_write(_:_:_:_:)
• hv_vcpu_exit_apic_access_read(_:_:)
• hv_vcpu_exit_info(_:_:)
• hv_vcpu_exit_init_ap(_:_:_:)
• hv_vcpu_exit_inject_excp(_:_:_:_:_:)
• hv_vcpu_exit_ioapic_eoi(_:_:)