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PG_PCI_BAR_MMIO

The base address register to use when advertising the graphics stack inside a virtual machine.

Declaration

var PG_PCI_BAR_MMIO: Int32 { get }

Discussion

Specify the following characteristics for the memory that this base address register references:

  • Allocate 16 kilobytes of memory.

  • Place MSI interrupt vectors between offsets 0x0000 and 0x0FFF of this memory block.

  • Place MMIO mapped registers starting at offset 0x1000.

When you see a read or write access to this memory region, call mmioRead(atOffset:) or mmioWrite(atOffset:value:) on the host device. The framework aligns reads and writes to addresses that are multiples of 4 bytes with a length of 4 bytes.

See Also

PCI Device Characteristics