---
title: simd_uint2
framework: simd
role: symbol
role_heading: Type Alias
path: simd/simd_uint2
---

# simd_uint2

A vector of two 32-bit unsigned integer elements.

## Declaration

```swift
typealias simd_uint2 = SIMD2<UInt32>
```

## Topics

### Functions to Create Two-Element Vectors From Other Vectors

- [simd_make_uint2(_:)](simd/simd_make_uint2(_:)-3fnd3.md)
- [simd_make_uint2(_:)](simd/simd_make_uint2(_:)-3cbr2.md)
- [simd_make_uint2(_:)](simd/simd_make_uint2(_:)-3m281.md)
- [simd_make_uint2(_:)](simd/simd_make_uint2(_:)-40jb1.md)
- [simd_make_uint2(_:)](simd/simd_make_uint2(_:)-9b05l.md)

### Functions to Create Two-Element Vectors From Scalar Values

- [simd_make_uint2(_:)](simd/simd_make_uint2(_:)-82fnu.md)
- [simd_make_uint2(_:_:)](simd/simd_make_uint2(_:_:).md)
- [simd_make_uint2_undef(_:)](simd/simd_make_uint2_undef(_:).md)

### Common Functions

- [simd_clamp(_:_:_:)](simd/simd_clamp(_:_:_:)-5yp7.md)
- [clamp(_:min:max:)](simd/clamp(_:min:max:)-5cyx4.md)
- [clamp(_:min:max:)](simd/clamp(_:min:max:)-59rk7.md)
- [simd_equal(_:_:)](simd/simd_equal(_:_:)-2urgh.md)

### Reduce Functions

- [simd_reduce_min(_:)](simd/simd_reduce_min(_:)-49p5s.md)
- [reduce_min(_:)](simd/reduce_min(_:)-2b4fr.md)
- [simd_reduce_max(_:)](simd/simd_reduce_max(_:)-4ket4.md)
- [reduce_max(_:)](simd/reduce_max(_:)-5dxp4.md)
- [simd_reduce_add(_:)](simd/simd_reduce_add(_:)-2q44e.md)
- [reduce_add(_:)](simd/reduce_add(_:)-5uvts.md)

### Extrema Functions

- [simd_min(_:_:)](simd/simd_min(_:_:)-9b5n7.md)
- [min(_:_:)](simd/min(_:_:)-6xef7.md)
- [min(_:_:)](simd/min(_:_:)-70ls4.md)
- [simd_max(_:_:)](simd/simd_max(_:_:)-8931y.md)
- [max(_:_:)](simd/max(_:_:)-9ch4d.md)
- [max(_:_:)](simd/max(_:_:)-9fm5e.md)

### Logic and Bitwise Functions

- [simd_any(_:)](simd/simd_any(_:)-64hll.md)
- [simd_all(_:)](simd/simd_all(_:)-1d7bv.md)
- [simd_bitselect(_:_:_:)](simd/simd_bitselect(_:_:_:)-5dqwa.md)

### Alternative Type Alias

- [uint2](simd/uint2.md)
- [vector_uint2](simd/vector_uint2.md)

## See Also

### Vector Data Types

- [simd_uint1](simd/simd_uint1.md)
- [simd_uint3](simd/simd_uint3.md)
- [simd_uint4](simd/simd_uint4.md)
- [simd_uint8](simd/simd_uint8.md)
- [simd_uint16](simd/simd_uint16.md)